Inter-sequence permutation turbo code system and operation methods thereof

ABSTRACT

A high performance real-time turbo code system is proposed. The proposed system exploits cooperative coding architecture and a proper decoding scheduling to achieve low error rate within a constrained latency. Permutation schemes and hardware embodiments utilizing the cooperative coding are also shown. Various memory saving techniques are provided to reduce memory usage in both encoder and decoder. The proposed system is compatible with  3   rd  generation mobile standards and cost of designing new parts exclusively for the proposed system can be minimized. This invention can provide substantial coding and system capacity gains for real-time applications in a wireless environment.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a turbo code system, more specifically,a turbo code system utilizing cooperative coding architecture and aproper decoding scheduling to achieve high performance real-timeencoding and decoding.

2. Description of Related Art

Turbo Code (TC) was invented in 1993, which renders extraordinary, nearShannon limit performance by applying the iterative decoding algorithm.Following researches on the area of Forward Error-Control (FEC) wereinspired from this primitive code structure and decoding algorithm. Weshall thus refer to any FEC system that utilizes the so-called “TurboPrinciple” in decoding as a Turbo Code System (TCS).

Codeword length influences the performance of TCS. TCS with longcodeword length performs excellently but decoder of the TCS has largedecoding latency and hardware complexity. Moreover, the decoder requiresconsiderable number of iterations to achieve desired performance. TheTCS with moderate codeword length often gives unsatisfactoryperformance. The TCS with short codeword length (say <200) often onlyprovides performance worse than that of conventional coding schemes.

Therefore, the conventional TCS renders high complexity, long decodinglatency and large memory space consumption; thereby diminishing theirapplicability. Commercial FEC applications require affordablecomplexity, low decoding latency and low power consumption. Furthermore,for use in a future generation wireless communication system, it ispreferred that any new enhancement be backward compatible with currentair interface standard. It will be shown in the following that thepresent invention does satisfy all these requirements.

SUMMARY OF THE INVENTION

Cooperative decoding can improve performance of TCS with short codewordlength. Besides, conventional A Posteriori Probability (APP) decodingmodules and interleaving techniques can be applied and the feature of“Backward Compatible” is attainable. More than one schedulers can beapplied for scheduling of cycles of APP decoding (or called APP decodingruns) or memory releasing.

Inter-Sequence Permutation (ISP) is a concept permuting betweendifferent sequences, and decoder of TCS can apply ISP to do cooperativedecoding. A long sequence of codeword can be chopped into shortersequences first, and by utilizing ISP, these shorter sequences can besubsequently decoded at decoder side simultaneously so as to achieve thegoal of parallel decoding. The ISP algorithm permuting these sequencescan be simple and require little effort. TCS applying ISP concept iscalled cooperative TCS and a turbo code applying the ISP concept iscalled ISP turbo code.

The proposed ISP turbo code can incorporate existing TC. Encoders ofexisting devices only need minor modification upon introducing the ISPpermutation technique. CRC and BCH codes or the like are optional fortermination test or error correction.

Memory usage would be the most critical implementation problem for thecooperative TCS. Decoding more than ten sequences at the same timerequires large memory space for the temporary received samples.Moreover, an ISP between sequences also requires buffers storingprobability measure for the nearby sequences. In the present invention,a termination test is used to halt decoding. In cooperative TCS, thetermination test can be further used for providing more reliableprobability measure and releasing memory. In summary, the terminationtest reduces power consumption and decoding latency, assists in thedecoding of the other sequences, and makes the utilization of memoryeconomic.

Proposed dynamic memory assignment decoder architecture can: i) reducingthe average decoding latency and the computation power consumption; ii)minimizing the memory usage; iii) lowering down the average iterationsat high error rate region; iv) parallel decoding; v) effective utilizingthe APP decoders.

Physical architecture of the ISP turbo code system of the presentinvention comprises two parts, which are an ISP turbo code encoder andan ISP turbo code decoder.

The ISP turbo code encoder is used for generating a pre-permutationcodeword sequence output before an ISP and a post-permutation codewordsequence output after the ISP from a sequence input, characterized incomprising an ISP interleaver within, wherein the said ISP interleaveris composed by an inter-sequence permuter and at least one conventionalsequence permuter arranged in a one-by-one manner; and wherein theinter-sequence permuter of the ISP interleaver performing ISP comprisesat least an ISP control unit and a memory pool, furthermore, an ISPalgorithm is permanently embedded or temporally recorded in the ISPcontrol unit controlling inputting to the memory pool, outputting fromthe memory pool, and execution of ISP between sequences stored in thememory pool.

The ISP turbo code decoder receiving the pre-permutation codewordsequence output and post-permutation codeword sequence outputtransmitted by the said ISP turbo code encoder, wherein the said ISPturbo code decoder decodes the said sequences by at least one aposteriori probability (APP) decoder therein, characterized in thatdecoding runs of the APP decoder is controlled by at least one schedulerand the decoding runs are performed in a loop manner so that the APPdecoder can repeatedly be used in decoding.

Details of apparatus and operations mentioned above will be discussed inmore detail below.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is described below by way of examples withreference to the accompanying drawings which will make it easier forreaders to understand the purpose, technical contents, characteristicsand achievement of the present invention.

FIG. 1 is an operation flowchart of an example of inter-sequencepermutation.

FIG. 2 is a schematic drawing of an example of ISP turbo code encoder.

FIG. 3 is a schematic drawing showing four possible arrangements of anISP interleaver.

FIG. 4 is a schematic drawing of an example of ISP turbo code decoder.

FIG. 5 is a schematic drawing showing two types of schedulerarrangements.

FIG. 6 is a schematic drawing showing an example of operations ofodd-numbered and even-numbered APP decoding runs.

FIG. 7 is a schematic drawing showing an example of operations ofscheduling performed by a scheduler.

DETAILED DESCRIPTION OF THE INVENTION

The details to the exemplary embodiments of the invention will bedescribed as follows and the same reference numbers are used throughoutthe drawings to refer to the same or like parts.

As stated above, ISP is a concept permuting between different sequences,which is easy to be comprehended for persons skilled in the art. Forease of understanding, we can take the sequences as matrices. Oneelement in one matrix, if it is to be permuted, will be moved to onecoordinate in the same or another matrix with the ordinal number withina span prior or successive to the element. In the present invention,preferably, one sequence is to be inter-sequence permuted with two othersequences which are consecutively before and after the sequence to bepermuted. One exemplary procedure of ISP is given in FIG. 1, wherein iis ordinal number of sequences, R and P are ordinal numbers of matrices,m and n are ordinal numbers of elements in the R-th and P-th matrices,where 0≦m,n<L and L is the length of sequence, respectively, j is avariable used in following operations, M is memory size (in term ofmaximum number of sequences stored), S is a variable called ISP spanwhich S<M−1, and N is total number of sequences, as follows:

-   step 101: set initial value of i=1; then go to step 102;-   step 102: Assign R for the i-th sequence, where R-th matrix is not    in use; Register R-th matrix as in-use, load i-th sequence to R-th    matrix with length L; j=1; then go to step 103;-   step 103: if i−j<0, then go to step 108; otherwise, go to step 104;-   step 104: choose m and n for the i-th and (i−j)-th sequences,    respectively, so that one element only swaps with one element of    another sequence throughout the ISP process; then go to step 105;-   step 105: swap m-th element of i-th sequence and n-th element of    (i−j)-th sequence; then go to step 106;-   step 106: m=m+2*S+1 and n−n+2*S+1; then go to step 107;-   step 107: if m<L and n<L, then go to step 105; otherwise, go to step    108;-   step 108: j=j+1; then go to step 109;-   step 109: if j<S+1, then go to step 103; otherwise, go to step 110;-   step 110: output sequences done by ISP and register the matrix    corresponding to outputted sequence as non-use; then go to step 111;-   step 111: if i=N, then output remaining un-outputted sequences,    register the matrix corresponding to outputted sequence non-use and    stop (step 112); otherwise, i=i+1 (step 113) then go to step 102;

One should understand that the above example is just an illustration ofone possible ISP algorithm. Many ISP algorithms are available to be usedas long as they meet the definitions (one element in one matrix, if itis to be permuted, will be moved to one coordinate in the same oranother matrix with the ordinal number within a span prior or successiveto the element.)

FIG. 2 illustrates a schematic drawing showing a typical ISP turbo codeencoder 200 according to the present invention. The ISP turbo codeencoder generates a pre-permutation codeword sequence output before anISP, and a post-permutation codeword sequence output after the ISP froma sequence input 201, characterized by comprising an ISP interleaver 202therein.

Illustrated in FIG. 3, the ISP interleaver is composed by aninter-sequence permuter 302 and at least one conventional sequencepermuter arranged in a one-by-one manner, which will be discussed morein detail below. The inter-sequence permuter 302 of the ISP interleaver202 performing ISP comprises at least an ISP control unit and a memorypool; furthermore, an ISP algorithm is permanently embedded ortemporally recorded in the ISP control unit controlling inputting to thememory pool, outputting from the memory pool, and execution of ISPbetween sequences stored in the memory pool.

Four possible classes of arrangement of the ISP interleaver 202 areillustrated, as follows:

Class I: comprising a first sequence permuter 301 utilizing aconventional sequence permuting algorithm, the inter-sequence permuter302, and a second sequence permuter 303 utilizing a conventionalsequence permuting algorithm, wherein the conventional sequencepermuting algorithm utilized in the first sequence permuter 301 andsecond sequence permuter 303 can be different or identical, and asequence inputted into the ISP interleaver 202 is processed in the orderof the first sequence permuter 301, the inter-sequence permuter 302, andthen the second sequence permuter 303.

Class II: comprising the inter-sequence permuter 302 and a secondsequence permuter 303 utilizing a conventional sequence permutingalgorithm, wherein a sequence inputted into the ISP interleaver 202 isprocessed in the order of the inter-sequence permuter 302 and then thesecond sequence permuter 303.

Class III: comprising a first sequence permuter 301 utilizing aconventional sequence permuting algorithm and the inter-sequencepermuter 302, wherein a sequence inputted into the ISP interleaver 202is processed in the order of the first sequence permuter 301 and thenthe inter-sequence permuter 302.

Class IV: comprising the inter-sequence permuter 302, wherein a sequenceinputted into the ISP interleaver 202 is processed by the inter-sequencepermuter 302.

Back to FIG. 2, the ISP turbo code encoder 200 comprises the ISPinterleaver 202 and two convolutional code encoders, namely a firstconvolutional code encoder 203 and a second convolutional code encoder204, located in portions of the ISP turbo code encoder 200 before andafter the ISP interleaver 202, respectively.

As illustrated in the drawing, the pre-permutation codeword sequenceoutput comprises two sequence outputs, which are the sequence output 205of “original sequence from the sequence input” and sequence output 206of “original sequence processed by the first convolutional code encoder203.” Similarly, the post-permutation sequence output comprises twosequence outputs, which are the sequence output 207 of “originalsequence processed by and in the order of the ISP interleaver 202 andthe second convolutional code encoder 204”, and the sequence output 208of “original sequence processed by the ISP interleaver 202.”

In practical application, only three sequence outputs out from the foursequence outputs 205, 206, 207 and 208 abovementioned are required,which can be chosen from only one of the two sets of sequence outputs:the sequence outputs 205, 206 and 207, or the sequence outputs 208, 207and 206.

Further, as illustrated in FIG. 2, the ISP turbo code encoder 200 isfurther provided with an optional encoder 209 located between thesequence input 201 and the ISP turbo code encoder 200. For example, theencoder 209 can be a BCH or CRC encoder.

Now, please refer to FIG. 4 for an embodiment of an ISP turbo codedecoder 400. The present invention employs a distributed design so as toattain the goal of do-loop operation.

The decoder 400 comprises an APP decoder pool 401 composed of at leastone APP decoder; a scheduler pool 402 composed of at least onescheduler; a memory pool 403 composed of a plurality of memory unitsstoring sequences; a memory index table 404 storing relationshipinformation between the memory units and probability measure sequences,and location of a specific sequences in the memory pool can be locatedby this table; an ISP control unit pool 405 composed of at least one ISPcontrol unit; an inter-sequence de-permutation (ISDP) control unit pool406 composed of at least one ISDP control unit; a first sequencepermuter pool 407 composed of at least one first sequence permuter; afirst sequence de-permuter pool 408 composed of at least one firstsequence de-permuter; a second sequence permuter pool 409 composed of atleast one second sequence permuter; and a second sequence de-permuterpool 410 composed of at least one second sequence de-permuter. Ade-permuter runs like a permuter in reverse manner.

Wherein the scheduler pool 402 controls operations of the APP decoderpool 401, the ISP control unit pool 405, the ISDP control unit pool 406,the first sequence permuter pool 407, the first sequence de-permuterpool 408, the second sequence permuter pool 409 and the second sequencede-permuter pool 410. In detail, a scheduler controls each cycle of APPdecoding (hereafter referred to as an “APP decoding run”), which relatesto ISP, ISDP, conventional sequence permutation, or related arithmeticoperation. Schedulers will be coordinated so that preferably allcomponents in the ISP turbo code decoder 400 work and cooperateseamlessly. It will be discussed in more detail later.

The scheduler pool 402 provides and retrieves sequences into and fromthe memory pool 403. The scheduler pool 402 provides and retrievessequences to and from the APP decoder pool 401. The scheduler pool 402updates and retrieves information to and from the decoder index table412 and memory index table 404. The ISP control unit pool 405 and ISDPcontrol unit pool 406 interchange sequences with the memory pool 403.The first sequence permuter pool 407, the first sequence de-permuterpool 408, the second sequence permuter pool 409, and the second sequencede-permuter pool 410 interchange sequences with the memory pool 403. Thescheduler pool 402 comprises at least one adder 610 and subtracter 611(both are not shown in FIG. 4).

Note that in all drawings in this specification, thick lines, e.g.between the APP decoder pool 401 and scheduler pool 402, represent busfor transmitting sequences/control signals, and narrow lines, e.g.between the scheduler controller 411 and scheduler pool 402, representsignal lines for transmitting control signals only.

Also note that arrangement of this embodiment would be modifiedaccording to the ISP interleaver 202 used in the ISP turbo code encoder200. What is illustrated is only for ISP interleaver 202 of Class I ofFIG. 3. If ISP interleaver 202 of Class II in FIG. 3 is used, the firstsequence permuter pool 407 and the first sequence de-permuter pool 408are not required. If ISP interleaver 202 of Class III in FIG. 3 is used,the second sequence permuter pool 409 and the second sequencede-permuter pool 410 are not required. If ISP interleaver 202 of ClassIV in FIG. 3 is used, the first sequence permuter pool 407, the firstsequence de-permuter pool 408, the second sequence permuter pool 409 andthe second sequence de-permuter pool 410 are all not required.

FIG. 4 only illustrates relative relations between components therein.Therefore, no signal input/output is indicated. Operations of thecomponents comprising signal input/output will be illustrated in FIG. 6.

Further, the adder and subtracter can be replaced by a multiplier and adivider respectively in accordance to scale or format of the sequences.For instance, if values in sequences are in logarithm-based, an adderand a subtracter are used.

With reference to FIG. 5, schedulers in the scheduler pool 402 can bearranged in “ring type” or “star type”, as illustrated. In the ringtype, one scheduler is controlled by commands transmitted by a precedingscheduler. If the star type is used, a scheduler controller 411 isrequired, which is connected to all schedulers and coordinates operationof all schedulers. Operation of schedulers will be discussed in detaillater.

Further, at least one decision maker 603 (shown in FIG. 6) foroutputting a hard decoding output sequence is included in the schedulerpool 402. A “hard decoding output” is one kind of digitally altereddecoding output of which all values are bits (symbols), so thatambiguous values are eliminated.

Further, the ISP turbo code decoder 400 comprises a decoder index table412 for storing information on the relationship between necessity toperform APP decoding and codeword sequence numbers. The decoder indextable at least is connected and interchanges information with thescheduler pool 402. If a codeword sequence is marked as “unnecessary”,then it will not go through APP decoding.

The scheduler pool 402 is connected to at least one termination tester413 for performing a termination test, which is a test to checkcorrectness or convergence of a sequence. Conventional tests such as CRCand sign check can be used.

Refer to FIG. 6 for a method of operation of APP decoding runs. An APPdecoding run block 601 illustrates operation of odd-numbered APPdecoding run, and an APP decoding run block 602 illustrates operation ofeven-numbered APP decoding run.

If the three codeword sequence outputs from the ISP turbo code encoder200 are sequence output 205, sequence output 206, and sequence output207, then a pre-permutation codeword sequence received from the ISPturbo code encoder, i.e. original sequence from the sequence input andthe sequence output of original sequence processed by the firstconvolutional code encoder, is processed in odd-numbered APP decodingruns and post-permutation codeword sequence received from the ISP turbocode encoder, i.e. the sequence output of original sequence processed byand in the order of the ISP interleaver and the second convolutionalcode encoder, is processed in even-numbered APP decoding runs.

The original sequence from the sequence input is called a first codewordsequence 606, the sequence output of original sequence processed by thefirst convolutional code encoder is called a second codeword sequence607, and the sequence output of original sequence processed by and inthe order of the ISP interleaver and the second convolutional codeencoder is called a third codeword sequence 609.

For odd-numbered APP decoding run, it comprises the following steps:

Step of first APP decoder input: a first input of the APP decoder 604 iscalculated by combining a sequence of a priori probability measure 605and the first codeword sequence 606 through an adder 610 of thescheduler pool 402, and then the process goes to the step of second APPdecoder input.

Step of second APP decoder input: the second codeword sequence 607 isinputted into the APP decoder 604 as a second input, and then theprocess goes to the step of outputting first result.

Step of outputting first result: the APP decoder 604 outputs a firstresult probability measure sequence and then the process goes to thestep of generating first soft decoding output;

step of generating first soft decoding output: a first sequence of softdecoding output 612 is calculated by eliminating the sequence of apriori probability measure 605 from the first result probability measuresequence through a subtracter 611 of the scheduler pool 402, and thenthe process goes to the step of first interchange 616;

step of first interchange 616 (details will be given later): the firstsequence of soft decoding output 612 is the sequence of a prioriprobability measure 608 of subsequent even-numbered APP decoding run.However, since even-numbered APP decoding runs works on post-permutationcodeword sequences, permutation must be performed on the first sequenceof soft decoding output 612 before it can be used in the subsequenteven-numbered APP decoding run.

For even-numbered APP decoding run, it comprises the following steps:

Step of third APP decoder input: an APP decoder 604 receives two inputswhich are the sequence of a priori probability measure sequence 608 instep of first interchange and the third codeword sequence 609, andoutputs a second result probability measure sequence, wherein the APPdecoder 604 can be or not be the same one as used in the odd-numberedAPP decoding run; then the process goes to the step of outputting secondresult.

Step of outputting second result: a second sequence of soft decodingoutput 614 is calculated by eliminating the sequence of a prioriprobability measure 608 in the step of first interchange or the step ofthird APP decoder input from the second result probability measuresequence through the subtracter 611 of the scheduler pool, which can beor not be the same as used in the odd-numbered APP decoding run, andthen the process goes to the step of second interchange 617.

Step of second interchange 617 (details will be given later): the secondsequence of soft decoding output 614 is the sequence of a prioriprobability measure 605 of subsequent odd-numbered APP decoding run.However, since odd-numbered APP decoding runs works on pre-permutationcodeword sequences, de-permutation must be performed on the secondsequence of soft decoding output 614 before it can be used in subsequentodd-numbered APP decoding run.

Alternatively, if the three codeword sequence outputs from the ISP turbocode encoder are sequence output 206, sequence output 207, and sequenceoutput 208, then pre-permutation codeword sequence received from the ISPturbo code encoder, i.e. the sequence output of original sequenceprocessed by the first convolutional code encoder, is processed ineven-numbered APP decoding runs and post-permutation codeword sequencereceived from the ISP turbo code encoder, i.e. the sequence output oforiginal sequence processed by and in the order of the ISP interleaverand the second convolutional code encoder, and the sequence output oforiginal sequence processed by the ISP interleaver, is processed inodd-numbered APP decoding runs.

The sequence output of original sequence processed by the ISPinterleaver 202 is called a first codeword sequence 606, the sequenceoutput of original sequence processed by and in the order of the ISPinterleaver and the second convolutional code encoder is called a secondcodeword sequence 607, and the sequence output of original sequenceprocessed by the first convolutional code encoder is called a thirdcodeword sequence 609,

For odd-numbered APP decoding run, it comprises the following steps:

Step of first APP decoder input: a first input of the APP decoder 604 iscalculated by combining a sequence of a priori probability measure 605and the first codeword sequence 606 through an adder 610 of thescheduler pool 402, and then the process goes to step of second APPdecoder input.

Step of second APP decoder input: the second codeword sequence 607 isinputted into the APP decoder 604 as a second input, and then theprocess goes to the step of outputting first result.

Step of outputting first result: the APP decoder 604 outputs a firstresult probability measure sequence, and then the process goes to thestep of generating first soft decoding output.

Step of generating first soft decoding output: a first codeword sequenceof soft decoding output 612 is calculated by eliminating the sequence ofa priori probability measure 605 from the first result probabilitymeasure sequence through a subtracter 611 of the scheduler pool 402, andthen the process goes to the step of first interchange 616;

step of first interchange 616 (details will be given later): the firstsequence of soft decoding output 612 is the sequence of a prioriprobability measure 608 of subsequent even-numbered APP decoding run.However, since even-numbered APP decoding runs works on pre-permutationcodeword sequences, de-permutation must be performed on the firstsequence of soft decoding output 612 before it can be used in thesubsequent even-numbered APP decoding run.

For even-numbered APP decoding run, it comprises the following steps:

Step of third APP decoder input: an APP decoder 604 receives two inputswhich are the sequence of a priori probability measure 608 in step offirst interchange and the third codeword sequence 609 and outputs asecond result probability measure sequence, wherein the APP decoder 604can be or not be the same one as used in the odd-numbered APP decodingrun; then the process goes to the step of outputting second result.

Step of outputting second result: a second sequence of soft decodingoutput 614 is calculated by eliminating the sequence of a prioriprobability measure 608 in the step of first interchange or the step ofthird APP decoder input from the second result probability measuresequence through the subtracter 611 of the scheduler pool 402, which canbe or not be the same as used in the odd-numbered APP decoding run, andthen the process goes to the step of second interchange 617;

Step of second interchange 617 (details will be given later): the secondsequence of soft decoding output 614 is the sequence of a prioriprobability measure 605 of subsequent odd-numbered APP decoding run.However, since odd-numbered APP decoding runs works on post-permutationcodeword sequences, permutation must be performed on the second sequenceof soft decoding output 614 before it can be used in subsequentodd-numbered APP decoding run.

In the step of first interchange 616 and the step of second interchange617, “permutation” is performed according to any one of four classes ofthe ISP interleaver 202 used in the ISP turbo code encoder 200, asfollows:

If the ISP interleaver 202 of Class I in FIG. 3 is used in encoder side,the permutation is performed by and in the order of a first sequencepermuter 301 in the first sequence permuter pool 407, an ISP controlunit in the ISP control unit pool 405 which works with the memory pool403, and a second sequence permuter 303 in the second sequence permuterpool 409, in the process of the ISP interleaver 202.

If the ISP interleaver 202 of Class II in FIG. 3 is used in encoderside, the permutation is performed by and in the order of an ISP controlunit in the ISP control unit pool 405 which works with the memory pool403, and a second sequence permuter 303 in the second sequence permuterpool 409, in the process of the ISP interleaver 202.

If the ISP interleaver 202 of Class III in FIG. 3 is used in encoderside, the permutation is performed by and in the order of a firstsequence permuter 301 in the first sequence permuter pool 407, and anISP control unit in the ISP control unit pool 405 which works with thememory pool 403, in the process of the ISP interleaver 202.

If the ISP interleaver 202 of Class IV in FIG. 3 is used in encodingside, the permutation is performed by an ISP control unit in the ISPcontrol unit pool 405 which works with the memory pool 403.

The “de-permutation” performed in the step of second interchange 617 orstep of first interchange 616 is performed according to any one of fourclasses of the ISP interleaver 202 used in the ISP turbo code encoder200, as follows:

If the ISP interleaver 202 of Class I in FIG. 3 is used in encoder side,the de-permutation is performed by and in the order of a second sequencede-permuter in the second sequence de-permuter pool 410, an ISDP controlunit in the ISDP control unit pool 406 which works with the memory pool403, and a first sequence de-permuter in the first sequence de-permuterpool 408, in the reverse process of the ISP interleaver 202.

If the ISP interleaver 202 of Class II in FIG. 3 is used in encoderside, the de-permutation is performed by and in the order of a secondsequence de-permuter in the second sequence de-permuter pool 410, and anISDP control unit in the ISDP control unit pool 406 which works with thememory pool 403, in the reverse process of the ISP interleaver 202.

If the ISP interleaver 202 of Class III in FIG. 3 is used in encoderside, the de-permutation is performed by and in the order of an ISDPcontrol unit in the ISDP control unit pool 406 which works with thememory pool 403, and a first sequence de-permuter in the first sequencede-permuter pool 408, in the reverse process of the ISP interleaver 202.

If the ISP interleaver 202 of Class IV in FIG. 3 is used in encodingside, the de-permutation is performed by an ISDP control unit in theISDP control unit pool 406 which works with the memory pool 403.

As stated above, the adder 610 and subtracter 611 can be replaced by amultiplier and a divider respectively in accordance with scale or formatof the sequences. For example, an adder and a subtracter are used whenvalues in a sequence are in logarithm-based.

Finally referring to FIG. 7, in order to control APP decoding runs by ascheduler, further steps in combination with the steps illustrated inFIG. 6 are further utilized. Essential steps of the further steps aredescribed as follows:

Step of initialization 701: a scheduler in the scheduler pool 402 isinitialized to work on the i-th codeword sequence, and then the processgoes to the step of APP decoding run 702.

Step of APP decoding run 702: an APP decoding run of the block 601 or602 is performed, and then the process goes to the step of checkingmaximum APP decoding run 703.

Step of checking maximum APP decoding run 703: if a prescribed maximumnumber of APP decoding run has been achieved is checked; if achieved,the process goes to the step of first outputting 705; if not achieved,the process goes to step of phasing 704.

Step of first outputting 705: since no more APP decoding run isavailable, an output result of the i-th codeword sequence is outputtedif the result has not been outputted yet, and then the process goes tostep of stopping 706.

step of stopping 706: stop the said scheduler;

Step of phasing 704: new value of i and corresponding number of APPdecoding run are calculated so that all sequences will go through allnumbers of APP decoding runs, and then the process goes to the step ofAPP decoding run 702.

To save time and resources, a termination test can be introduced. Thetest accelerates the speed to obtain a result. The test comprises thefollowing steps:

Step of first necessity check 707: the step 707 is performed betweenstep 701 and step 702. According to the decoder index table 412, if anAPP decoding run to be occurred is required is checked. The schedulercan check necessity for performing APP decoding of related sequences. Ifthe APP decoding run to be occurred is required, the process goes to thestep 702. If the APP decoding run to be occurred is not required, theprocess goes to the step 703. If step 707 exists, then the process goesto the step 707 directly instead of the step 702.

The step of first decision making (not shown in FIG. 7) is performedbetween the step of outputting first result of FIG. 6 and the step ofgenerating first soft decoding output of FIG. 6. Further, the firstresult probability measure sequence is inputted into the decision maker603 of the scheduler pool and a first hard decoding output 613 isoutputted. If the sequence outputs of ISP turbo code encoder are thesequence output of original sequence processed by the firstconvolutional code encoder, the sequence output of original sequenceprocessed by and in the order of the ISP interleaver and the secondconvolutional code encoder, and the sequence output of original sequenceprocessed by the ISP interleaver, the first hard decoding output shouldbe performed de-permutation to generate a de-permuted first harddecoding output because termination test which will be discussed belowat step 708 works with sequences without permutation;

The step of second decision making (not shown in FIG. 7) is performedbetween the step of third APP decoder input of FIG. 6 and the step ofoutputting second result of FIG. 6. Further, the second resultprobability measure sequence is inputted into a decision maker 603 andoutputted as a second hard decoding output 615. If the sequence outputsof the ISP turbo code encoder are original sequence from the sequenceinput, sequence output of original sequence processed by the firstconvolutional code encoder, and sequence output original sequenceprocessed by and in the order of the ISP interleaver and the secondconvolutional code encoder, the second hard decoding output should beperformed de-permutation to generate a de-permuted second hard decodingoutput because termination test which will be discussed below at step708 works with sequences without permutation;

The decision maker 603 can be employed in odd-numbered APP decoding runblock 601, even-numbered decoding run block 602, or both. Thus the stepof first decision making and/or the step of second decision making donot need to exist in both the APP decoding runs. Further, the“de-permutation” is performed in accordance with type of ISP interleaverused in encoder side, as follows:

If the ISP interleaver of Class I in FIG. 3 is used in encoder side, asa result, the de-permutation is performed by and in the order of asecond sequence de-permuter in the second sequence de-permuter pool, anISDP control unit in the ISDP control unit pool which works with thememory pool, and a first sequence de-permuter in the first sequencede-permuter pool, in the reverse process of the ISP interleaver.

If the ISP interleaver of Class II in FIG. 3 is used in encoder side,the de-permutation is performed by and in the order of a second sequencede-permuter in the second sequence de-permuter pool, and an ISDP controlunit in the ISDP control unit pool which works with the memory pool, inthe reverse process of the ISP interleaver.

If the ISP interleaver of Class III in FIG. 3 is used in encoder side,the de-permutation is performed by and in the order of an ISDP controlunit in the ISDP control unit pool which works with the memory pool, anda first sequence de-permuter in the first sequence de-permuter pool, inthe reverse process of the ISP interleaver.

If the ISP interleaver of Class IV in FIG. 3 is used in encoder side,the de-permutation is performed by an ISDP control unit in the ISDPcontrol unit pool which works with the memory pool.

Following, the step of termination test 708 is performed between step702 and step 703. The termination test, which could be a conventionalCRC test, is performed. That is, if the hard decoding output passes thetest is checked. If the test is passed, then the process goes to thestep of updating 709. If the test is not passed or the APP decoding runblock 601, 602 does not have the hard decoding output, then the processgoes to the step of checking maximum APP decoding run 703.

The step of updating 709 updates the decoder index table 412corresponding to pre-permutation codeword sequence according to a resultof the termination test in the step 708. Then the process goes to thestep of checking maximum APP decoding run 703.

In step 708, if the probability measure sequence of hard decoding output613 or 615 from the decision maker passes the test, then the probabilitymeasure sequence of hard decoding output 613 or 615, or the de-permutedfirst hard decoding output or the de-permuted second hard decodingoutput can be directly outputted or used to calibrate the codewordsequence of soft decoding output 612 or 614, respectively.

Further, a step of post-termination test 710 is performed between thestep 709 and step 703. A post-termination test is performed in the step710. That is, to check the decoder index table 412 if thepost-permutation codeword sequence is required for successive APPdecoding, and result thereof is used to update the decoder index tablecorresponding to the post-permutation codeword sequence. Then theprocess goes to the step of checking maximum APP decoding run 703;

If the step of post-termination test 710 exists, then the process goesto the step 710 after step 707 when the APP decoding run to be occurredis not required. Also the process goes to the step 710 after step 709.

In steps of termination test 708 and post-termination test 710, theresult of termination test and post-termination test can be used torelease unnecessary information in the memory pool such as the codewordsequences and the probability measure sequences.

The operation illustrated in FIG. 7 take advantage of schedulers and/ortermination/pos-termination tests, wherein schedulers can performparallel processing on sequences, as illustrated in the “ring type”arrangement of schedulers for example, after initialization of thedecoder, scheduler a receives first sequence and working on first APPdecoding run thereof. After completion of the first APP decoding run,scheduler a passes information to scheduler b and scheduler b continuesworking on second APP decoding run of the first sequence, while thescheduler a receives a new sequence, and so on. We can see thatschedulers are arranged to work on different sequences and different APPdecoding runs in parallel automatically, which is one technical effectof the present invention. What illustrated above is one preferredoperation of schedulers and of course modifications can be done bypersons skilled in the art.

Further, termination tests can mark pre-permutation codeword sequencesor post-permutation codeword sequences as “unnecessary to perform APPdecoding” so that if all preceding sequences of a sequence to beperformed are marked as “unnecessary to perform APP decoding, the APPdecoding run to be performed can be skipped to save time and codesequences in the memory pool or memory index pool can be released tosave resources.

Note that for ease of understanding, routine operations which areconvention techniques such as memory capacity check and release areomitted in steps above. Persons skilled in the art should practice thisinvention with necessary modifications without departing from scope ofthe present invention.

1. An inter-sequence permutation (ISP) turbo code system, comprising: anISP turbo code encoder for receiving a sequence input and thengenerating a pre-permutation codeword sequence output before an ISP anda post-permutation codeword sequence output after the ISP, wherein theencoder includes: an ISP interleaver having: an inter-sequence permuterperforms ISP and comprises at least one ISP control unit and a memorypool; an ISP algorithm is permanently embedded or temporally recorded inthe at least one ISP control unit to control input to and output fromthe memory pool, and execution of the ISP between sequences stored inthe memory pool; and an ISP turbo code decoder for receiving thepre-permutation codeword sequence output and post-permutation codewordsequence output, wherein the decoder decodes the sequences by at leastone a posteriori probability (APP) decoder therein, characterized inthat decoding runs of the APP decoder are controlled by at least onescheduler and the decoding runs are performed in a do-loop manner sothat the APP decoder can repeatedly be used in decoding.
 2. The systemas claimed in claim 1, wherein the ISP turbo code encoder comprises afirst convolutional code encoder and a second convolutional codeencoder, located in portions of the ISP turbo code encoder before andafter the ISP interleaver, respectively.
 3. The system as claimed inclaim 2, wherein the ISP turbo code encoder outputs three codewordsequence outputs which are an original sequence from the sequence input,a sequence output of original sequence processed by the firstconvolutional code encoder, and a sequence output of original sequenceprocessed by and in the order of the ISP interleaver and the secondconvolutional code encoder.
 4. The turbo code system as claimed in claim2, wherein the ISP turbo code encoder outputs three codeword sequenceoutputs which are a sequence output of original sequence processed bythe first convolutional code encoder, a sequence output of originalsequence processed by and in the order of the ISP interleaver and thesecond convolutional code encoder, and a sequence output of originalsequence processed by the ISP interleaver.
 5. The turbo code system asclaimed in claim 1, wherein the ISP interleaver comprises a firstsequence permuter utilizing a conventional sequence permuting algorithm,the inter-sequence permuter, and a second sequence permuter utilizing aconventional sequence permuting algorithm, wherein the conventionalsequence permuting algorithms utilized in the first sequence permuterand second sequence permuter can be different or identical, and asequence inputted into the ISP interleaver is processed in the order ofthe first sequence permuter, the inter-sequence permuter, and then thesecond sequence permuter.
 6. The turbo code system as claimed in claim1, wherein the ISP interleaver comprises the inter-sequence permuter anda second sequence permuter utilizing a conventional sequence permutingalgorithm, wherein a sequence inputted into the ISP interleaver isprocessed in the order of the inter-sequence permuter and then thesecond sequence permuter.
 7. The turbo code system as claimed in claim1, wherein the ISP interleaver comprises a first sequence permuterutilizing a conventional sequence permuting algorithm and theinter-sequence permuter, wherein a sequence inputted into the ISPinterleaver is processed in the order of the first sequence permuter andthen the inter-sequence permuter.
 8. The turbo code system as claimed inclaim 1, wherein the ISP interleaver comprises the inter-sequencepermuter, wherein a sequence inputted into the ISP interleaver isprocessed by the inter-sequence permuter.
 9. The turbo code system asclaimed in claim 2, wherein the ISP turbo code encoder is furtherconnected to a BCH or CRC encoder located between the sequence input andthe ISP turbo code encoder.
 10. The turbo code system as claimed inclaim 5, wherein the ISP turbo code decoder comprises: an APP decoderpool having at least one APP decoder; a scheduler pool having at leastone scheduler; a memory pool having a plurality of memory units forstoring sequences; a memory index table for storing information onrelationship between the memory units and received sequences; an ISPcontrol unit pool having at least one ISP control unit; aninter-sequence de-permutation (ISDP) control unit pool having at leastone ISDP control unit; a first sequence permuter pool having at leastone first sequence permuter; a first sequence de-permuter pool having atleast one first sequence de-permuter; a second sequence permuter poolhaving at least one second sequence permuter; and a second sequencede-permuter pool having at least one second sequence de-permuter;wherein the scheduler pool controls operations of the APP decoder pool,the ISP control unit pool, the ISDP control unit pool, the firstsequence permuter pool, the first sequence de-permuter pool, the secondsequence permuter pool and the second sequence de-permuter pool; whereinthe scheduler pool stores and retrieves sequences into and from thememory pool; wherein the scheduler pool provides and retrieves sequencesto and from the APP decoder pool; wherein the scheduler pool updates andretrieves information to and from the decoder index table and memoryindex table; wherein the ISP control unit pool and ISDP control unitpool interchange sequences with the memory pool; wherein the firstsequence permuter pool, the first sequence de-permuter pool, the secondsequence permuter pool, and the second sequence de-permuter poolinterchange sequences with the memory pool; and wherein the schedulerpool comprises at least one adder and subtracter.
 11. The turbo codesystem as claimed in claim 6, wherein the ISP turbo code decodercomprises: an APP decoder pool having at least one APP decoder; ascheduler pool having at least one scheduler; a memory pool having aplurality of memory units for storing sequences; a memory index tablefor storing information on relationship between the memory units andreceived sequences; an ISP control unit pool having at least one ISPcontrol unit; an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit; a second sequence permuter poolhaving at least one second sequence permuter; and a second sequencede-permuter pool having at least one second sequence de-permuter;wherein the scheduler pool controls operations of the APP decoder pool,the ISP control unit pool, the ISDP control unit pool, the secondsequence permuter pool and the second sequence de-permuter pool; whereinthe scheduler pool stores and retrieves sequences into and from thememory pool; wherein the scheduler pool provides and retrieves sequencesto and from the APP decoder pool; wherein the scheduler pool updates andretrieves information to and from the decoder index table and memoryindex table; wherein the ISP control unit pool and ISDP control unitpool interchange sequences with the memory pool; wherein the secondsequence permuter pool and the second sequence de-permuter poolinterchange sequences with the memory pool; and wherein the schedulerpool comprises at least one adder and subtracter.
 12. The turbo codesystem as claimed in claim 7, the ISP turbo code decoder comprises: anAPP decoder pool having at least one APP decoder; a scheduler poolhaving at least one scheduler; a memory pool having a plurality ofmemory units for storing sequences; a memory index table for storinginformation on relationship between the memory units and receivedsequences; an ISP control unit pool having at least one ISP controlunit; an inter-sequence de-permutation (ISDP) control unit pool havingat least one ISDP control unit; a first sequence permuter pool having atleast one first sequence permuter; and a first sequence de-permuter poolhaving at least one first sequence de-permuter; wherein the schedulerpool controls operations' of the APP decoder pool, the ISP control unitpool, the ISDP control unit pool, the first sequence permuter pool, andthe first sequence de-permuter pool; wherein the scheduler pool storesand retrieves sequences into and from the memory pool; wherein thescheduler pool provides and retrieves sequences to and from the APPdecoder pool; wherein the scheduler pool updates and retrievesinformation to and from the decoder index table and memory index table;wherein the ISP control unit pool and ISDP control unit pool interchangesequences with the memory pool; wherein the first sequence permuter pooland first sequence de-permuter pool interchange sequences with thememory pool; and wherein the scheduler pool comprises at least one adderand subtracter.
 13. The turbo code system as claimed in claim 8, the ISPturbo code decoder comprises: an APP decoder pool having at least oneAPP decoder; a scheduler pool having at least one scheduler; a memorypool having a plurality of memory units for storing sequences; a memoryindex table storing information on relationship between the memory unitsand received sequences; an ISP control unit pool having at least one ISPcontrol unit; an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit; wherein the scheduler poolcontrols operations of the APP decoder pool, the ISP control unit pool,and the ISDP control unit pool; wherein the scheduler pool stores andretrieves sequences into and from the memory pool; wherein the schedulerpool provides and retrieves sequences to and from the APP decoder pool;wherein the scheduler pool updates and retrieves information to and fromthe decoder index table and memory index table; wherein the ISP controlunit pool and ISDP control unit pool interchange sequences with thememory pool; and wherein the scheduler pool comprises at least one adderand subtracter.
 14. The turbo code system as claimed in claim 10,wherein the adder and subtracter can be replaced by a multiplier and adivider respectively in accordance with scale or format of thesequences.
 15. The turbo code system as claimed in claim 11, wherein theadder and subtracter can be replaced by a multiplier and a dividerrespectively in accordance with scale or format of the sequences. 16.The turbo code system as claimed in claim 12, wherein the adder andsubtracter can be replaced by a multiplier and a divider respectively inaccordance with scale or format of the sequences.
 17. The turbo codesystem as claimed in claim 13, wherein the adder and subtracter can bereplaced by a multiplier and a divider respectively in accordance withscale or format of the sequences.
 18. The turbo code system as claimedin claim 10, further comprises a scheduler controller connected to everyscheduler in the scheduler pool if the scheduler pool is arranged in astar type.
 19. The turbo code system as claimed in claim 11, furthercomprises a scheduler controller connected to every scheduler in thescheduler pool if the scheduler pool is arranged in a star type.
 20. Theturbo code system as claimed in claim 12, further comprises a schedulercontroller connected to every scheduler in the scheduler pool if thescheduler pool is arranged in a star type.
 21. The turbo code system asclaimed in claim 13, further comprises a scheduler controller connectedto every scheduler in the scheduler pool if the scheduler pool isarranged in a star type.
 22. The turbo code system as claimed in claim10, wherein the scheduler pool further comprises at least one decisionmaker used to output a hard decoding output sequence.
 23. The turbo codesystem as claimed in claim 11, wherein the scheduler pool furthercomprises at least one decision maker used to output a hard decodingoutput sequence.
 24. The turbo code system as claimed in claim 12,wherein the scheduler pool further comprises at least one decision makerused to output a hard decoding output sequence.
 25. The turbo codesystem as claimed in claim 13, wherein the scheduler pool furthercomprises at least one decision maker used to output a hard decodingoutput sequence.
 26. The turbo code system as claimed in claim 10,wherein the ISP turbo code decoder further comprises a decoder indextable storing information on relationship between necessity to performAPP decoding and codeword sequence numbers, which connects andinterchanges information with the scheduler pool.
 27. The turbo codesystem as claimed in claim 11, wherein the ISP turbo code decoderfurther comprises a decoder index table storing information onrelationship between necessity to perform APP decoding and codewordsequence numbers, which connects and interchanges information with thescheduler pool.
 28. The turbo code system as claimed in claim 12,wherein the ISP turbo code decoder further comprises a decoder indextable storing information on relationship between necessity to performAPP decoding and codeword sequence numbers, which connects andinterchanges information with the scheduler pool.
 29. The turbo codesystem as claimed in claim 13, wherein the ISP turbo code decoderfurther comprises a decoder index table storing information onrelationship between necessity to perform APP decoding and codewordsequence numbers, which connects and interchanges information with thescheduler pool.
 30. The turbo code system as claimed in claim 10,wherein the scheduler pool is further connected to at least onetermination tester for performing a termination test.
 31. The turbo codesystem as claimed in claim 11, wherein the scheduler pool is furtherconnected to at least one termination tester for performing atermination test.
 32. The turbo code system as claimed in claim 12,wherein the scheduler pool is further connected to at least onetermination tester for performing a termination test.
 33. The turbo codesystem as claimed in claim 13, wherein the scheduler pool is furtherconnected to at least one termination tester for performing atermination test. 34-59. (canceled)
 60. The turbo code system as claimedin claim 10, wherein only one of the ISP and ISDP control unit poolexists if the ISP algorithm and the ISDP algorithm are the same, and theexisting control unit pool performs both ISP and ISDP.
 61. The turbocode system as claimed in claim 11, wherein only one of the ISP and ISDPcontrol unit pool exists if the ISP algorithm and the ISDP algorithm arethe same, and the existing control unit pool performs both ISP and ISDP.62. The turbo code system as claimed in claim 12, wherein only one ofthe ISP and ISDP control unit pool exists if the ISP algorithm and theISDP algorithm are the same, and the existing control unit pool performsboth ISP and ISDP.
 63. The turbo code system as claimed in claim 13,wherein only one of the ISP and ISDP control unit pool exists if the ISPalgorithm and the ISDP algorithm are the same, and the existing controlunit pool performs both ISP and ISDP.
 64. A method for generatingprobability measure sequences using the system as claimed in claim 3,wherein the ISP turbo code decoder uses codeword sequence outputs of theISP turbo code encoder, wherein pre-permutation codeword sequence outputreceived from the encoder, which comprises the original sequence fromthe sequence input and the sequence output of original sequenceprocessed by the first convolutional code encoder, is processed inodd-numbered APP decoding runs, and post-permutation codeword sequencereceived from the ISP turbo code encoder, which comprises the sequenceoutput of original sequence processed by and in the order of the ISPinterleaver and the second convolutional code encoder, is processed ineven-numbered APP decoding runs, whereby the original sequence from thesequence input is called a first codeword sequence, the sequence outputof original sequence processed by a first convolutional code encoder iscalled a second codeword sequence, and the sequence output of originalsequence processed by and in the order of the ISP interleaver and asecond convolutional code encoder is called a third codeword sequence,the method comprising the following steps for odd-numbered APP decodingrun and even-numbered APP decoding run: For the odd-numbered APPdecoding run: step of first APP decoder input: calculating a first inputof the APP decoder by combining a sequence of a priori probabilitymeasure and the first codeword sequence through an adder of a schedulerpool; step of second APP decoder input: inputting the second codewordsequence into the APP decoder as a second input; step of outputtingfirst result: outputting a first result probability measure sequence bythe APP decoder; step of generating first soft decoding output:calculating a first sequence of soft decoding output by eliminating thesequence of a priori probability measure from the first resultprobability measure sequence through a subtracter of the scheduler pool;step of first interchange: outputting the first sequence of softdecoding output as a sequence of a priori probability measure of thesubsequent even-numbered APP decoding run, wherein the even-numbered APPdecoding runs work on post-permutation codeword sequences, such thatpermutation must be performed on the first sequence of soft decodingoutput before the first sequence of soft decoding output can be used inthe subsequent even-numbered APP decoding run; For the even-numbered APPdecoding run: step of third APP decoder input: receiving two inputs byan APP decoder wherein the inputs are the sequence of a prioriprobability measure in step of first interchange and the third codewordsequence, and outputting a second result probability measure sequence,wherein the APP decoder can be or not be the same as one used in theodd-numbered APP decoding run; step of outputting second result:calculating a second sequence of soft decoding output by eliminating thesequence of a priori probability measure in step of first interchange orstep of third APP decoder input from the second result probabilitymeasure sequence through the subtracter of the scheduler pool, whereinthe subtracter can be or not be the same as one used in the odd-numberedAPP decoding run; step of second interchange: outputting the secondsequence of soft decoding output as the sequence of a priori probabilitymeasure of the subsequent odd-numbered APP decoding run, wherein theodd-numbered APP decoding runs work on pre-permutation codewordsequences, de-permutation must be performed on the second sequence ofsoft decoding output before the second sequence of soft decoding outputcan be used in the subsequent odd-numbered APP decoding run.
 65. Amethod for calculating probability measure sequences using the system asclaimed in claim 4, wherein the ISP turbo code decoder uses codewordsequence outputs of the ISP turbo code encoder, wherein pre-permutationcodeword sequence received from the ISP turbo code encoder, whichcomprises the sequence output of original sequence processed by thefirst convolutional code encoder, is processed in even-numbered APPdecoding runs, and post-permutation codeword sequence received from theISP turbo code encoder, which comprises the sequence output of originalsequence processed by and in the order of the ISP interleaver and thesecond convolutional code encoder, and the sequence output of originalsequence processed by the ISP interleaver, is processed in odd-numberedAPP decoding runs, whereby the sequence output of original sequenceprocessed by the ISP interleaver is called a first codeword sequence,the sequence output of original sequence processed by and in the orderof the ISP interleaver and a second convolutional code encoder is calleda second codeword sequence, and the sequence output of original sequenceprocessed by a first convolutional code encoder is called a thirdcodeword sequence, the method comprising the following steps forodd-numbered APP decoding run and even-numbered APP decoding run: Forthe odd-numbered APP decoding run: step of first APP decoder input:calculating a first input of the APP decoder by combining a sequence ofa priori probability measure and the first codeword sequence through anadder of a scheduler pool; step of second APP decoder input: inputtingthe second codeword sequence into the APP decoder as a second input;step of outputting first result: outputting a first result probabilitymeasure sequence by the APP decoder; step of generating first softdecoding output: calculating a first sequence of soft decoding output byeliminating the sequence of a priori probability measure from the firstresult probability measure sequence through a subtracter of thescheduler pool; step of first interchange: outputting the first sequenceof soft decoding output as a sequence of a priori probability measure ofthe subsequent even-numbered APP decoding run, wherein the even-numberedAPP decoding runs work on pre-permutation codeword sequences, such thatde-permutation must be performed on the first sequence of soft decodingoutput before the first sequence of soft decoding output can be used inthe subsequent even-numbered APP decoding run; For the even-numbered APPdecoding run: step of third APP decoder input: receiving two inputs byan APP decoder wherein the inputs are the sequence of a prioriprobability measure in step of first interchange and the third codewordsequence, and outputting a second result probability measure sequence,wherein the APP decoder can be or not be the same as one used in theodd-numbered APP decoding run; step of outputting second result:calculating a second sequence of soft decoding output by eliminating thesequence of a priori probability measure in step of first interchange orstep of third APP decoder input from the second result probabilitymeasure sequence through the subtracter of the scheduler pool, whereinthe subtracter can be or not be the same as one used in the odd-numberedAPP decoding run; step of second interchange: outputting the secondsequence of soft decoding output as the sequence of a priori probabilitymeasure of the subsequent odd-numbered APP decoding run, wherein theodd-numbered APP decoding runs work on post-permutation codewordsequences, permutation must be performed on the second sequence of softdecoding output before the second sequence of soft decoding output canbe used in the subsequent odd-numbered APP decoding run.
 66. The methodas claimed in claim 64, wherein the “permutation” performed in the stepof first interchange is performed according to the ISP interleaver usedin the ISP turbo code encoder, wherein the permutation can be performedin accordance with one of the following cases: if a first ISPinterleaver recited is used in encoder side, a first ISP turbo codedecoder is employed, and the permutation is performed by and in theorder of a first sequence permuter in the first sequence permuter pool,an ISP control unit in the ISP control unit pool which works with thememory pool, and a second sequence permuter in the second sequencepermuter pool, in the process of the ISP interleaver; if a second ISPinterleaver is used in encoder side, a second ISP turbo code decoder isemployed, and the permutation is performed by and in the order of an ISPcontrol unit working in the ISP control unit pool which works with thememory pool, and a second sequence permuter in the second sequencepermuter pool, in the process of the ISP interleaver; if a third ISPinterleaver is used in encoder side, a third ISP turbo code decoder isemployed, and the permutation is performed by and in the order of afirst sequence permuter in the first sequence permuter pool, and an ISPcontrol unit in the ISP control unit pool which works with the memorypool, in the process of the ISP interleaver; and if a fourth ISPinterleaver is used in encoder side, a fourth ISP turbo code decoder isemployed, and the permutation is performed by an ISP control unit in theISP control unit pool which works with the memory pool; wherein thefirst ISP interleaver comprises a first sequence permuter utilizing aconventional sequence permuting algorithm, the inter-sequence permuter,and a second sequence permuter utilizing a conventional sequencepermuting algorithm; wherein the first ISP turbo code decoder comprisesan APP decoder pool having at least one APP decoder, a scheduler poolhaving at least one scheduler, a memory pool having a plurality ofmemory units for storing sequences, a memory index table for storinginformation on relationship between the memory units and receivedsequences, an ISP control unit pool having at least one ISP controlunit, an inter-sequence de-permutation (ISDP) control unit pool havingat least one ISDP control unit, a first sequence permuter pool having atleast one first sequence permuter, a first sequence de-permuter poolhaving at least one first sequence de-permuter, a second sequencepermuter pool having at least one second sequence permuter, and a secondsequence de-permuter pool having at least one second sequencede-permuter; wherein the second ISP interleaver comprises theinter-sequence permuter and a second sequence permuter utilizing aconventional sequence permuting algorithm; wherein the second ISP turbocode decoder comprises an APP decoder pool having at least one APPdecoder, a scheduler pool having at least one scheduler, a memory poolhaving a plurality of memory units for storing sequences, a memory indextable for storing information on relationship between the memory unitsand received sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a second sequence permuter poolhaving at least one second sequence permuter, and a second sequencede-permuter pool having at least one second sequence de-permuter;wherein the third ISP interleaver comprises a first sequence permuterutilizing a conventional sequence permuting algorithm and theinter-sequence permuter; wherein the third ISP turbo code decodercomprises an APP decoder pool having at least one APP decoder, ascheduler pool having at least one scheduler, a memory pool having aplurality of memory units for storing sequences, a memory index tablefor storing information on relationship between the memory units andreceived sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a first sequence permuter poolhaving at least one first sequence permuter, and a first sequencede-permuter pool having at least one first sequence de-permuter; whereinthe fourth ISP interleaver comprises the inter-sequence permuter;wherein the fourth ISP turbo code decoder comprises an APP decoder poolhaving at least one APP decoder, a scheduler pool having at least onescheduler, a memory pool having a plurality of memory units for storingsequences, a memory index table storing information on relationshipbetween the memory units and received sequences, an ISP control unitpool having at least one ISP control unit, an inter-sequencede-permutation (ISDP) control unit pool having at least one ISDP controlunit.
 67. The method as claimed in claim 65, wherein the “permutation”performed in the step of second interchange is performed according tothe ISP interleaver used in the ISP turbo code encoder, wherein thepermutation can be performed in accordance with one of the followingcases: if a first ISP interleaver is used in encoder side, a first ISPturbo code decoder is employed, and the permutation is performed by andin the order of a first sequence permuter in the first sequence permuterpool, an ISP control unit in the ISP control unit pool which works withthe memory pool, and a second sequence permuter in the second sequencepermuter pool, in the process of the ISP interleaver; if a second ISPinterleaver is used in encoder side, a second ISP turbo code decoder isemployed, and the permutation is performed by and in the order of an ISPcontrol unit working in the ISP control unit pool which works with thememory pool, and a second sequence permuter in the second sequencepermuter pool, in the process of the ISP interleaver; if a third ISPinterleaver is used in encoder side, a third ISP turbo code decoder isemployed, and the permutation is performed by and in the order of afirst sequence permuter in the first sequence permuter pool, and an ISPcontrol unit in the ISP control unit pool which works with the memorypool, in the process of the ISP interleaver; and if a fourth ISPinterleaver is used in encoder side, a fourth ISP turbo code decoder isemployed, and the permutation is performed by an ISP control unit in theISP control unit pool which works with the memory pool; wherein thefirst ISP interleaver comprises a first sequence permuter utilizing aconventional sequence permuting algorithm, the inter-sequence permuter,and a second sequence permuter utilizing a conventional sequencepermuting algorithm; wherein the first ISP turbo code decoder comprisesan APP decoder pool having at least one APP decoder, a scheduler poolhaving at least one scheduler, a memory pool having a plurality ofmemory units for storing sequences, a memory index table for storinginformation on relationship between the memory units and receivedsequences, an ISP control unit pool having at least one ISP controlunit, an inter-sequence de-permutation (ISDP) control unit pool havingat least one ISDP control unit, a first sequence permuter pool having atleast one first sequence permuter, a first sequence de-permuter poolhaving at least one first sequence de-permuter, a second sequencepermuter pool having at least one second sequence permuter, and a secondsequence de-permuter pool having at least one second sequencede-permuter; wherein the second ISP interleaver comprises theinter-sequence permuter and a second sequence permuter utilizing aconventional sequence permuting algorithm; wherein the second ISP turbocode decoder comprises an APP decoder pool having at least one APPdecoder, a scheduler pool having at least one scheduler, a memory poolhaving a plurality of memory units for storing sequences, a memory indextable for storing information on relationship between the memory unitsand received sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a second sequence permuter poolhaving at least one second sequence permuter, and a second sequencede-permuter pool having at least one second sequence de-permuter;wherein the third ISP interleaver comprises a first sequence permuterutilizing a conventional sequence permuting algorithm and theinter-sequence permuter; wherein the third ISP turbo code decodercomprises an APP decoder pool having at least one APP decoder, ascheduler pool having at least one scheduler, a memory pool having aplurality of memory units for storing sequences, a memory index tablefor storing information on relationship between the memory units andreceived sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a first sequence permuter poolhaving at least one first sequence permuter, and a first sequencede-permuter pool having at least one first sequence de-permuter; whereinthe fourth ISP interleaver comprises the inter-sequence permuter;wherein the fourth ISP turbo code decoder comprises an APP decoder poolhaving at least one APP decoder, a scheduler pool having at least onescheduler, a memory pool having a plurality of memory units for storingsequences, a memory index table storing information on relationshipbetween the memory units and received sequences, an ISP control unitpool having at least one ISP control unit, an inter-sequencede-permutation (ISDP) control unit pool having at least one ISDP controlunit.
 68. The method as claimed in claim 64, wherein the“de-permutation” performed in the step of second interchange isperformed according to ISP interleaver used in the ISP turbo codeencoder, wherein the de-permutation can be performed in accordance withone of the following cases: if a first ISP interleaver is used inencoder side, a first ISP turbo code decoder is employed, and thede-permutation is performed by and in the order of a second sequencede-permuter in the second sequence de-permuter pool, an ISDP controlunit in the ISDP control unit pool which works with the memory pool, anda first sequence de-permuter in the first sequence de-permuter pool, inthe reverse process of the ISP interleaver; if a second ISP interleaveris used in encoder side, a second ISP turbo code decoder is employed,and the de-permutation is performed by and in the order of a secondsequence de-permuter in the second sequence de-permuter pool, and anISDP control unit in the ISDP control unit pool which works with thememory pool, in the reverse process of the ISP interleaver; if a thirdISP interleaver is used in encoder side, a third ISP turbo code decoderis employed, and the de-permutation is performed by and in the order ofan ISDP control unit in the ISDP control unit pool which works with thememory pool, and a first sequence de-permuter in the first sequencede-permuter pool, in the reverse process of the ISP interleaver; and ifa fourth ISP interleaver is used in encoder side, a fourth ISP turbocode decoder is employed, and the de-permutation is performed by an ISDPcontrol unit in the ISDP control unit pool which works with the memorypool. wherein the first ISP interleaver comprises a first sequencepermuter utilizing a conventional sequence permuting algorithm, theinter-sequence permuter, and a second sequence permuter utilizing aconventional sequence permuting algorithm; wherein the first ISP turbocode decoder comprises an APP decoder pool having at least one APPdecoder, a scheduler pool having at least one scheduler, a memory poolhaving a plurality of memory units for storing sequences, a memory indextable for storing information on relationship between the memory unitsand received sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a first sequence permuter poolhaving at least one first sequence permuter, a first sequencede-permuter pool having at least one first sequence de-permuter, asecond sequence permuter pool having at least one second sequencepermuter, and a second sequence de-permuter pool having at least onesecond sequence de-permuter; wherein the second ISP interleavercomprises the inter-sequence permuter and a second sequence permuterutilizing a conventional sequence permuting algorithm; wherein thesecond ISP turbo code decoder comprises an APP decoder pool having atleast one APP decoder, a scheduler pool having at least one scheduler, amemory pool having a plurality of memory units for storing sequences, amemory index table for storing information on relationship between thememory units and received sequences, an ISP control unit pool having atleast one ISP control unit, an inter-sequence de-permutation (ISDP)control unit pool having at least one ISDP control unit, a secondsequence permuter pool having at least one second sequence permuter, anda second sequence de-permuter pool having at least one second sequencede-permuter; wherein the third ISP interleaver comprises a firstsequence permuter utilizing a conventional sequence permuting algorithmand the inter-sequence permuter; wherein the third ISP turbo codedecoder comprises an APP decoder pool having at least one APP decoder, ascheduler pool having at least one scheduler, a memory pool having aplurality of memory units for storing sequences, a memory index tablefor storing information on relationship between the memory units andreceived sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a first sequence permuter poolhaving at least one first sequence permuter, and a first sequencede-permuter pool having at least one first sequence de-permuter; whereinthe fourth ISP interleaver comprises the inter-sequence permuter;wherein the fourth ISP turbo code decoder comprises an APP decoder poolhaving at least one APP decoder, a scheduler pool having at least onescheduler, a memory pool having a plurality of memory units for storingsequences, a memory index table storing information on relationshipbetween the memory units and received sequences, an ISP control unitpool having at least one ISP control unit, an inter-sequencede-permutation (ISDP) control unit pool having at least one ISDP controlunit.
 69. The method as claimed in claim 65, wherein the“de-permutation” performed in the step of first interchange is performedaccording to ISP interleaver used in the ISP turbo code encoder, whereinthe de-permutation can be performed in accordance with one of thefollowing cases: if a first ISP interleaver is used in encoder side, afirst ISP turbo code decoder is employed, and the de-permutation isperformed by and in the order of a second sequence de-permuter in thesecond sequence de-permuter pool, an ISDP control unit in the ISDPcontrol unit pool which works with the memory pool, and a first sequencede-permuter in the first sequence de-permuter pool, in the reverseprocess of the ISP interleaver; if a second ISP interleaver is used inencoder side, a second ISP turbo code decoder is employed, and thede-permutation is performed by and in the order of a second sequencede-permuter in the second sequence de-permuter pool, and an ISDP controlunit in the ISDP control unit pool which works with the memory pool, inthe reverse process of the ISP interleaver; if a third ISP interleaveris used in encoder side, a third ISP turbo code decoder is employed, andthe de-permutation is performed by and in the order of an ISDP controlunit in the ISDP control unit pool which works with the memory pool, anda first sequence de-permuter in the first sequence de-permuter pool, inthe reverse process of the ISP interleaver; and if a fourth ISPinterleaver is used in encoder side, a fourth ISP turbo code decoder isemployed, and the de-permutation is performed by an ISDP control unit inthe ISDP control unit pool which works with the memory pool. wherein thefirst ISP interleaver comprises a first sequence permuter utilizing aconventional sequence permuting algorithm, the inter-sequence permuter,and a second sequence permuter utilizing a conventional sequencepermuting algorithm; wherein the first ISP turbo code decoder comprisesan APP decoder pool having at least one APP decoder, a scheduler poolhaving at least one scheduler, a memory pool having a plurality ofmemory units for storing sequences, a memory index table for storinginformation on relationship between the memory units and receivedsequences, an ISP control unit pool having at least one ISP controlunit, an inter-sequence de-permutation (ISDP) control unit pool havingat least one ISDP control unit, a first sequence permuter pool having atleast one first sequence permuter, a first sequence de-permuter poolhaving at least one first sequence de-permuter, a second sequencepermuter pool having at least one second sequence permuter, and a secondsequence de-permuter pool having at least one second sequencede-permuter; wherein the second ISP interleaver comprises theinter-sequence permuter and a second sequence permuter utilizing aconventional sequence permuting algorithm; wherein the second ISP turbocode decoder comprises an APP decoder pool having at least one APPdecoder, a scheduler pool having at least one scheduler, a memory poolhaving a plurality of memory units for storing sequences, a memory indextable for storing information on relationship between the memory unitsand received sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a second sequence permuter poolhaving at least one second sequence permuter, and a second sequencede-permuter pool having at least one second sequence de-permuter;wherein the third ISP interleaver comprises a first sequence permuterutilizing a conventional sequence permuting algorithm and theinter-sequence permuter; wherein the third ISP turbo code decodercomprises an APP decoder pool having at least one APP decoder, ascheduler pool having at least one scheduler, a memory pool having aplurality of memory units for storing sequences, a memory index tablefor storing information on relationship between the memory units andreceived sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a first sequence permuter poolhaving at least one first sequence permuter, and a first sequencede-permuter pool having at least one first sequence de-permuter; whereinthe fourth ISP interleaver comprises the inter-sequence permuter;wherein the fourth ISP turbo code decoder comprises an APP decoder poolhaving at least one APP decoder, a scheduler pool having at least onescheduler, a memory pool having a plurality of memory units for storingsequences, a memory index table storing information on relationshipbetween the memory units and received sequences, an ISP control unitpool having at least one ISP control unit, an inter-sequencede-permutation (ISDP) control unit pool having at least one ISDP controlunit.
 70. The method as claimed in claim 64, wherein the adder andsubtracter can be replaced by a multiplier and a divider respectively inaccordance with scale or format of the sequences.
 71. The method asclaimed in claim 65, wherein the adder and subtracter can be replaced bya multiplier and a divider respectively in accordance with scale orformat of the sequences.
 72. The method as claimed in claim 64, furthercomprising the following steps of scheduling: step of initialization:initializing a scheduler in a scheduler pool to work on the i-thcodeword sequence; going to step of APP decoding run; step of APPdecoding run: performing an APP decoding run according to numberthereof; going to step of checking maximum APP decoding run; step ofchecking maximum APP decoding run: checking if a prescribed maximumnumber of APP decoding run has been achieved; if achieved, going to stepof first outputting; if not achieved, going to step of phasing; step offirst outputting: outputting result of the i-th codeword sequence; stepof stopping: stopping the scheduler; step of phasing: selecting a newvalue of i and corresponding number of APP decoding run; going to thestep of APP decoding run.
 73. The method as claimed in claim 65, furthercomprising the following steps of scheduling: step of initialization:initializing a scheduler in a scheduler pool to work on the i-thcodeword sequence; going to step of APP decoding run; step of APPdecoding run: performing an APP decoding run according to numberthereof; going to step of checking maximum APP decoding run; step ofchecking maximum APP decoding run: checking if a prescribed maximumnumber of APP decoding run has been achieved; if achieved, going to stepof first outputting; if not achieved, going to step of phasing; step offirst outputting: outputting result of the i-th codeword sequence; stepof stopping: stopping the scheduler; step of phasing: selecting a newvalue of i and corresponding number of APP decoding run; going to thestep of APP decoding run.
 74. The method as claimed in claim 72, furthercomprising the following steps: step of first necessity check, which isbetween the step of initialization and the step of APP decoding run:according to a decoder index table, checking if an APP decoding run tobe occurred is required; if required, going to the step of APP decodingrun; if not required, going to the step of checking maximum APP decodingrun; if the step of first necessity check exists, then the step ofphasing is directed to the step of first necessity check directlyinstead of the step of APP decoding run; step of first decision making,which is between the step of outputting first result and the step ofgenerating first soft decoding output further: inputting the firstresult probability measure sequence into a decision maker of thescheduler pool and outputting a first hard decoding output; step oftermination test, which is between the step of APP decoding run and thestep of checking maximum APP decoding run: performing a terminationtest, which could be a conventional CRC test, to check if the first harddecoding output passes the test; if the test is passed, then going to astep of updating; if the test is not passed or the APP decoding run justperformed does not have the hard decoding output, then going to the stepof checking maximum APP decoding run; step of updating: updating adecoder index table corresponding to the pre-permutation codewordsequence according to result of the first termination test; then goingto the step of checking maximum APP decoding run.
 75. The method asclaimed in claim 73, further comprising the following steps: step offirst necessity check, which is between the step of initialization andthe step of APP decoding run: according to a decoder index table,checking if an APP decoding run to be occurred is required; if required,going to the step of APP decoding run; if not required, going to thestep of checking maximum APP decoding run; if the step of firstnecessity check exists, then the step of phasing is directed to the stepof first necessity check directly instead of the step of APP decodingrun; step of first decision making, which is between the step ofoutputting first result and the step of generating first soft decodingoutput further: inputting the first result probability measure sequenceinto a decision maker of the scheduler pool and outputting a first harddecoding output; the first hard decoding output should be performedde-permutation to generate a de-permuted first hard decoding output;step of termination test, which is between the step of APP decoding runand the step of checking maximum APP decoding run: performing atermination test, which could be a conventional CRC test, to check ifthe de-permuted first hard decoding output passes the test; if the testis passed, then going to a step of updating; if the test is not passedor the APP decoding run just performed does not have the de-permutedhard decoding output, then going to the step of checking maximum APPdecoding run; step of updating: updating a decoder index tablecorresponding to the pre-permutation codeword sequence according toresult of the first termination test; then going to the step of checkingmaximum APP decoding run.
 76. The method as claimed in claim 74, furthercomprising the following steps: step of post-termination test, whichexists between the step of updating and the step of checking maximum APPdecoding run: performing a post-termination test to check with thedecoder index table if the post-permutation codeword sequence isrequired for successive APP decoding; a result of the test is used toupdate the decoder index table corresponding to the post-permutationcodeword sequence or to release unnecessary post-permutation codewordsequence in the memory pool; if the step of post-termination testexists, then directing “not required” output of the step of firstnecessity check and output of the step of updating to the step ofpost-termination test.
 77. The method as claimed in claim 75, furthercomprising the following steps: step of post-termination test, whichexists between the step of updating and the step of checking maximum APPdecoding run: performing a post-termination test to check with thedecoder index table if the post-permutation codeword sequence isrequired for successive APP decoding; a result of the test is used toupdate the decoder index table corresponding to the post-permutationcodeword sequence or to release unnecessary post-permutation codewordsequence in the memory pool; if the step of post-termination testexists, then directing “not required” output of the step of firstnecessity check and output of the step of updating to the step ofpost-termination test.
 78. The method as claimed in claim 74, furthercomprising the following step: in the step of termination test, if thefirst hard decoding output from the decision maker passes the test, thenoutputting or calibrating the sequence of soft decoding output by usingthe first hard decoding output, or releasing unnecessary pre-permutationcodeword sequence in the memory pool.
 79. The method as claimed in claim75, further comprising the following step: in the step of terminationtest, if the de-permuted first hard decoding output from the decisionmaker passes the test, then outputting or calibrating the sequence ofsoft decoding output by using the de-permuted first hard decodingoutput, or releasing unnecessary pre-permutation codeword sequence inthe memory pool.
 80. The method as claimed in claim 72, furthercomprising the following steps: step of first necessity check, whichexists between the step of initialization and the step of APP decodingrun: according to a decoder index table, checking if an APP decoding runto be occurred is required; if required, going to the step of APPdecoding run; if not required, going to the step of checking maximum APPdecoding run; if the step of first necessity check exists, then going tothe step of first necessity check directly instead of the step of APPdecoding run after the step of phasing; step of second decision making,which exists between the step of third APP decoder input and the step ofoutputting second result: inputting the second result probabilitymeasure sequence to a decision maker of the scheduler pool andoutputting a second hard decoding output; the second hard decodingoutput is performed de-permutation to generate a de-permuted second harddecoding output; step of termination test, which exists between the stepof APP decoding run and the step of checking maximum APP decoding run:performing a termination test, which could be a conventional CRC test,to check if the de-permuted second hard decoding output passes the test;if the test is passed, then going to a step of updating; if the test isnot passed or the APP decoding run just performed does not have thede-permuted second hard decoding output, then going to the step ofchecking maximum APP decoding run; step of updating: updating thedecoder index table corresponding to the pre-permutation codewordsequence according to results of the termination test; then going to thestep of checking maximum APP decoding run.
 81. The method as claimed inclaim 73, further comprising the following steps: step of firstnecessity check, which exists between the step of initialization and thestep of APP decoding run: according to a decoder index table, checkingif an APP decoding run to be occurred is required; if required, going tothe step of APP decoding run; if not required, going to the step ofchecking maximum APP decoding run; if the step of first necessity checkexists, then going to the step of first necessity check directly insteadof the step of APP decoding run after the step of phasing; step ofsecond decision making, which exists between the step of third APPdecoder input and the step of outputting second result: inputting thesecond result probability measure sequence to a decision maker of thescheduler pool and outputting a second hard decoding output; step oftermination test, which exists between the step of APP decoding run andthe step of checking maximum APP decoding run: performing a terminationtest, which could be a conventional CRC test, to check if the secondhard decoding output passes the test; if the test is passed, then goingto a step of updating; if the test is not passed or the APP decoding runjust performed does not have the second hard decoding output, then goingto the step of checking maximum APP decoding run; step of updating:updating the decoder index table corresponding to the pre-permutationcodeword sequence according to results of the termination test; thengoing to the step of checking maximum APP decoding run.
 82. The methodas claimed in claim 80, further comprising the following steps: step ofpost-termination test, which exists between the step of updating and thestep of checking maximum APP decoding run: performing a post-terminationtest to check with the decoder index table if the post-permutationcodeword sequence is required for successive APP decoding; result of thetest is used to update the decoder index table corresponding to thepost-permutation codeword sequence or to release unnecessarypost-permutation codeword sequence in the memory pool; if the step ofpost-termination test exists, then directing “not required” output ofthe step of first necessity check and output of the step of updating tothe step of post-termination test.
 83. The method as claimed in claim81, further comprising the following steps: step of post-terminationtest, which exists between the step of updating and the step of checkingmaximum APP decoding run: performing a post-termination test to checkwith the decoder index table if the post-permutation codeword sequenceis required for successive APP decoding; result of the test is used toupdate the decoder index table corresponding to the post-permutationcodeword sequence or to release unnecessary post-permutation codewordsequence in the memory pool; if the step of post-termination testexists, then directing “not required” output of the step of firstnecessity check and output of the step of updating to the step ofpost-termination test.
 84. The method as claimed in claim 80, furthercomprising the following step: in the step of termination test, if thede-permuted second hard decoding output corresponding to thepre-permutation codeword sequence from the decision maker passes thetest, then outputting or directing the sequence of soft decoding outputby using the de-permuted second hard decoding output, or releasingunnecessary pre-permutation codeword sequence in the memory pool. 85.The method as claimed in claim 81, further comprising the followingstep: in the step of termination test, if the second hard decodingoutput corresponding to the pre-permutation codeword sequence from thedecision maker passes the test, then outputting or directing thesequence of soft decoding output by using the second hard decodingoutput, or releasing unnecessary pre-permutation codeword sequence fromthe memory pool.
 86. The method as claimed in claim 75, wherein the“de-permutation” performed in step of first decision making is performedaccording to ISP interleaver used in the ISP turbo code encoder; thede-permutation can be performed in accordance with one of the followingcases: if a first ISP interleaver is used in encoder side, a first ISPturbo code decoder is employed, and the de-permutation is performed byand in the order of a second sequence de-permuter in the second sequencede-permuter pool, an ISDP control unit in the ISDP control unit poolwhich works with the memory pool, and a first sequence de-permuter inthe first sequence de-permuter pool, in the reverse process of the ISPinterleaver; if a second ISP interleaver is used in encoder side, asecond ISP turbo code decoder is employed, and the de-permutation isperformed by and in the order of a second sequence de-permuter in thesecond sequence de-permuter pool, and an ISDP control unit in the ISDPcontrol unit pool which works with the memory pool, in the reverseprocess of the ISP interleaver; if a third ISP interleaver is used inencoder side, a third ISP turbo code decoder is employed, and thede-permutation is performed by and in the order of an ISDP control unitin the ISDP control unit pool which works with the memory pool, and afirst sequence de-permuter in the first sequence de-permuter pool, inthe reverse process of the ISP interleaver; and if a fourth ISPinterleaver is used in encoder side, a fourth ISP turbo code decoder isemployed, and the de-permutation is performed by an ISDP control unit inthe ISDP control unit pool which works with the memory pool. wherein thefirst ISP interleaver comprises a first sequence permuter utilizing aconventional sequence permuting algorithm, the inter-sequence permuter,and a second sequence permuter utilizing a conventional sequencepermuting algorithm; wherein the first ISP turbo code decoder comprisesan APP decoder pool having at least one APP decoder, a scheduler poolhaving at least one scheduler, a memory pool having a plurality ofmemory units for storing sequences, a memory index table for storinginformation on relationship between the memory units and receivedsequences, an ISP control unit pool having at least one ISP controlunit, an inter-sequence de-permutation (ISDP) control unit pool havingat least one ISDP control unit, a first sequence permuter pool having atleast one first sequence permuter, a first sequence de-permuter poolhaving at least one first sequence de-permuter, a second sequencepermuter pool having at least one second sequence permuter, and a secondsequence de-permuter pool having at least one second sequencede-permuter; wherein the second ISP interleaver comprises theinter-sequence permuter and a second sequence permuter utilizing aconventional sequence permuting algorithm; wherein the second ISP turbocode decoder comprises an APP decoder pool having at least one APPdecoder, a scheduler pool having at least one scheduler, a memory poolhaving a plurality of memory units for storing sequences, a memory indextable for storing information on relationship between the memory unitsand received sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a second sequence permuter poolhaving at least one second sequence permuter, and a second sequencede-permuter pool having at least one second sequence de-permuter;wherein the third ISP interleaver comprises a first sequence permuterutilizing a conventional sequence permuting algorithm and theinter-sequence permuter; wherein the third ISP turbo code decodercomprises an APP decoder pool having at least one APP decoder, ascheduler pool having at least one scheduler, a memory pool having aplurality of memory units for storing sequences, a memory index tablefor storing information on relationship between the memory units andreceived sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a first sequence permuter poolhaving at least one first sequence permuter, and a first sequencede-permuter pool having at least one first sequence de-permuter; whereinthe fourth ISP interleaver comprises the inter-sequence permuter;wherein the fourth ISP turbo code decoder comprises an APP decoder poolhaving at least one APP decoder, a scheduler pool having at least onescheduler, a memory pool having a plurality of memory units for storingsequences, a memory index table storing information on relationshipbetween the memory units and received sequences, an ISP control unitpool having at least one ISP control unit, an inter-sequencede-permutation (ISDP) control unit pool having at least one ISDP controlunit.
 87. The method as claimed in claim 80, wherein the“de-permutation” performed in step of second decision making isperformed according to ISP interleaver used in the ISP turbo codeencoder; the de-permutation can be performed in accordance with one ofthe following cases: if a first ISP interleaver is used in encoder side,a first ISP turbo code decoder is employed, and the de-permutation isperformed by and in the order of a second sequence de-permuter in thesecond sequence de-permuter pool, an ISDP control unit in the ISDPcontrol unit pool which works with the memory pool, and a first sequencede-permuter in the first sequence de-permuter pool, in the reverseprocess of the ISP interleaver; if a second ISP interleaver is used inencoder side, a second ISP turbo code decoder is employed, and thede-permutation is performed by and in the order of a second sequencede-permuter in the second sequence de-permuter pool, and an ISDP controlunit in the ISDP control unit pool which works with the memory pool, inthe reverse process of the ISP interleaver; if a third ISP interleaveris used in encoder side, a third ISP turbo code decoder is employed, andthe de-permutation is performed by and in the order of an ISDP controlunit in the ISDP control unit pool which works with the memory pool, anda first sequence de-permuter in the first sequence de-permuter pool, inthe reverse process of the ISP interleaver; and if a fourth ISPinterleaver is used in encoder side, a fourth ISP turbo code decoder isemployed, and the de-permutation is performed by an ISDP control unit inthe ISDP control unit pool which works with the memory pool, wherein thefirst ISP interleaver comprises a first sequence permuter utilizing aconventional sequence permuting algorithm, the inter-sequence permuter,and a second sequence permuter utilizing a conventional sequencepermuting algorithm; wherein the first ISP turbo code decoder comprisesan APP decoder pool having at least one APP decoder, a scheduler poolhaving at least one scheduler, a memory pool having a plurality ofmemory units for storing sequences, a memory index table for storinginformation on relationship between the memory units and receivedsequences, an ISP control unit pool having at least one ISP controlunit, an inter-sequence de-permutation (ISDP) control unit pool havingat least one ISDP control unit, a first sequence permuter pool having atleast one first sequence permuter, a first sequence de-permuter poolhaving at least one first sequence de-permuter, a second sequencepermuter pool having at least one second sequence permuter, and a secondsequence de-permuter pool having at least one second sequencede-permuter; wherein the second ISP interleaver comprises theinter-sequence permuter and a second sequence permuter utilizing aconventional sequence permuting algorithm; wherein the second ISP turbocode decoder comprises an APP decoder pool having at least one APPdecoder, a scheduler pool having at least one scheduler, a memory poolhaving a plurality of memory units for storing sequences, a memory indextable for storing information on relationship between the memory unitsand received sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a second sequence permuter poolhaving at least one second sequence permuter, and a second sequencede-permuter pool having at least one second sequence de-permuter;wherein the third ISP interleaver comprises a first sequence permuterutilizing a conventional sequence permuting algorithm and theinter-sequence permuter; wherein the third ISP turbo code decodercomprises an APP decoder pool having at least one APP decoder, ascheduler pool having at least one scheduler, a memory pool having aplurality of memory units for storing sequences, a memory index tablefor storing information on relationship between the memory units andreceived sequences, an ISP control unit pool having at least one ISPcontrol unit, an inter-sequence de-permutation (ISDP) control unit poolhaving at least one ISDP control unit, a first sequence permuter poolhaving at least one first sequence permuter, and a first sequencede-permuter pool having at least one first sequence de-permuter; whereinthe fourth ISP interleaver comprises the inter-sequence permuter;wherein the fourth ISP turbo code decoder comprises an APP decoder poolhaving at least one APP decoder, a scheduler pool having at least onescheduler, a memory pool having a plurality of memory units for storingsequences, a memory index table storing information on relationshipbetween the memory units and received sequences, an ISP control unitpool having at least one ISP control unit, an inter-sequencede-permutation (ISDP) control unit pool having at least one ISDP controlunit.